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ACT: A Low Power VLIW Cluster Coprocessor for DSP Applications
The ACT Adaptive Cellular Telephony coprocessor architecture is described and analyzed using a set of widely used DSP algorithms. Performance and power are compared to equivalent implementations on ASIC and embedded processor platforms. Flexibility is achieved by fine-grain program control of communication and execution resources. Compression techniques, simple addressing modes...
Tags: DSP, Coprocessor, VLIW, Flexibility, University Of Utah, ASICs, Processors, Semiconductors, Hardware, Components
White papers 2006-01-20

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Modeling Wire Delay, Area, Power, and Performance in a Simulation Infrastructure
IBM present Justice, a set of extensions to the Liberty simulation infrastructure that model chip area, wire length, and power consumption. Based on an architectural specification of a processor, Justice estimates the area and per-access power consumption of each module in the architecture. It then constructs a floorplan for the...
Tags: Performance, Power Consumption, Modeling, IBM Corp., Processors, Semiconductors, Hardware, Components
White papers 2006-03-01
FR-V Single-Chip Multicore Processor: FR1000
To realize the low power consumption and low-cost equipment needed to decode high definition broadcasts, Fujitsu has developed a single-chip multicore processor FR1000 that integrates four 8-way, Very Long Instruction Word VLIW FR-V processor cores. This new multicore processor is fabricated using a 90 nm, nine-metal-layer CMOS process and a...
Tags: Fujitsu Ltd., Processors, Semiconductors, Hardware, Components
White papers 2006-04-01
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